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PostPosted: Sat Sep 04, 2010 1:35 pm 
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Joined: Sat Aug 28, 2010 4:24 pm
Posts: 9
Ok, I can kick myself :oops: .

As I mentioned previously I would experiment with Wake-on-LAN.
So I checked the uboot sourcecode from the Lacie GPL tarball.
It mentioned in ./board/mv88fxx81/Common/mvCommon.c:282 that byte 8 is set to zero to enable WoL.
Now, I did :D, and now my box waits for a WoL packet, but I appear not to send the correct magic sequence.
Moreover, it doesn't seem to react to the buttonpress, while it should according to the sourcecode :? ./board/mv88fxx81/Common/mvCommon.c:386

Code:
Soc: MV88F5182 Rev 2
CPU: ARM926 (Rev 0) running @ 400Mhz
SysClock = 133Mhz , TClock = 166Mhz

USB 0: host mode
USB 1: device mode
PCI 0: PCI Express Root Complex Interface
PCI 1: Conventional PCI, speed = 33000000
Net:   egiga0 [PRIME]
Power Button Released
   Sleep Mode & WOL
egiga0 no link
Waiting for WOL Magic Packet
Using egiga0 device


Any suggestions whatsoever to get passed the WoL limbo :D?


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PostPosted: Sat Sep 04, 2010 6:07 pm 
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Joined: Thu May 08, 2008 11:23 am
Posts: 112
Location: near Toulouse, France
ruben wrote:
Any suggestions whatsoever to get passed the WoL limbo :D?
Maybe CLUNC will do the job.
CLUNC is a netconsole that you can get here.
If this doesn't work, Albert (aaribaud) will probably know the solution.
Or try asking on the lacie-nas mailing list ;-)


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PostPosted: Sun Sep 05, 2010 12:49 pm 
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Joined: Sat Aug 28, 2010 4:24 pm
Posts: 9
Clunc doesn't seem to work either :(

I'll post to the mailinglist later today or tomorrow. (or ping aaribaud? :) )


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PostPosted: Sun Sep 05, 2010 1:02 pm 
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Joined: Thu May 08, 2008 11:23 am
Posts: 112
Location: near Toulouse, France
ruben wrote:
I'll post to the mailinglist later today or tomorrow. (or ping aaribaud? :) )
I'd recommend trying the list (lacie-nas@sequanux.org).
Albert is subscribed: he posted yesterday ;-)


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PostPosted: Sat Sep 11, 2010 6:15 am 
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Joined: Thu May 08, 2008 11:23 am
Posts: 112
Location: near Toulouse, France
rosbif wrote:
I'd recommend trying the list (lacie-nas@sequanux.org).
This discussion continued on the lacie-nas mailing list.
Anyone interested can read it here.
AIUI the problem was worked around by resetting the 8th byte of the I2C EEPROM to 0xFF using an external programmer (but with the EEPROM in situ).
The conclusion is "don't mess with the 8th (WOL) byte of the EEPROM until the real problem is understood" :(


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